//************************************************
//  Filename      : iir.v                             
//  Author        : Kingstacker                  
//  Company       : School                       
//  Email         : kingstacker_work@163.com     
//  Device        : Altera cyclone4 ep4ce6f17c8  
//  Description   :  iir top;                            
//************************************************
module  iir #(parameter WIDTH = 16)(
    //input;
    input    wire    clk,
    input    wire    rst_n,
    input    wire    signed  [WIDTH-1:0] din,
    //output;
    output   wire    signed [WIDTH-1:0] dout   
);
wire signed [WIDTH-1:0] y1_dout;
wire signed [WIDTH-1:0] y2_dout;
wire signed [WIDTH-1:0] y3_dout;
wire signed [WIDTH-1:0] y4_dout;
wire signed [WIDTH-1:0] y5_dout;
wire signed [WIDTH-1:0] y6_dout;
wire signed [WIDTH-1:0] y7_dout;
first_level  u1(
    .clk                (clk),
    .rst_n              (rst_n),
    .xin                (din),
    .yout               (y1_dout)
);
second_level  u2(
    .clk                (clk),
    .rst_n              (rst_n),
    .xin                (y1_dout),
    .yout               (y2_dout)
);
third_level  u3(
    .clk                (clk),
    .rst_n              (rst_n),
    .xin                (y2_dout),
    .yout               (y3_dout)
);
four_level  u4(
    .clk                (clk),
    .rst_n              (rst_n),
    .xin                (y3_dout),
    .yout               (y4_dout)
);
five_level  u5(
    .clk                (clk),
    .rst_n              (rst_n),
    .xin                (y4_dout),
    .yout               (y5_dout)
);
six_level  u6(
    .clk                (clk),
    .rst_n              (rst_n),
    .xin                (y5_dout),
    .yout               (y6_dout)
);
seven_level  u7(
    .clk                (clk),
    .rst_n              (rst_n),
    .xin                (y6_dout),
    .yout               (y7_dout)
);
eight_level  u8(
    .clk                (clk),
    .rst_n              (rst_n),
    .xin                (y7_dout),
    .yout               (dout)
);

endmodule